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bl24c 02a/04a/08a/16a BL24C02A/04a/08a/16a belling proprietary information. unauthorized photocopy and duplication prohibited ? 2016 belling all rights reserved www.belling.com.cn 1 - 1 6 f eatures ? compatible with all i 2 c b idirectiona l data transfer protocol ? memory array: C 2k bits ( 256 x 8 ) / 4k bits (512 x 8) / 8k bits (1024 x 8) / 16k bits (2048 x 8 ) of eeprom C page size: 16 bytes ? single supply voltage and high speed: C 1 mhz random and sequential read modes ? write: C byte write within 3 ms C page write within 3 ms C partial page writes allowed ? write protect pin for hardware data protection ? schmitt trigger, filtered inputs for noise suppression ? high - reliability C endurance: 1 million write cycles C data retention: 100 years ? enhanced esd/latch - up protection C hbm 8000v ? 8 - lead pdip/sop/tssop /udfn and wlcsp4 packages d escription ? the BL24C02A/bl24c04a/bl24c08a/bl24c16a provides 2048/4096/8192/16384 bits of serial electrically erasable and programmable read - only memory (eeprom), organized as 256/512/1024/2048 words of 8 bits each. ? the device is optimized for use in many industrial and commercial applications where low - power and low - voltage operation are essential. pin configuration a 2 g n d v c c w p a 0 a 1 a 2 g n d a 0 a 1 a 2 g n d a 0 a 1 a 2 g n d v c c w p v c c w p v c c w p 1 2 3 4 5 6 7 8 1 2 3 4 1 2 3 4 5 6 7 8 5 6 7 8 5 6 7 8 1 2 3 4 8 - l e a d p d i p 8 - l e a d s o p 8 - l e a d t s s o p 8 - p a d d f n 1 2 a b v c c v s s s c l s d a w l c s p 4 b o t t e m v i e w m a r k i n g s i d e ( t o p v i e w ) s c l s d a s c l s d a s c l s d a s c l s d a a 0 a 1
bl24c 02a/04a/08a/16a BL24C02A/04a/08a/16a belling proprietary information. unauthorized photocopy and duplication prohibited ? 2016 belling all rights reserved www.belling.com.cn 2 - 1 6 pin descriptions block diagram device/page addresses (a2, a1 and a0): the a2, a1 and a0 pins are device address inputs that are hard wire for the BL24C02A/bl24c04a/bl24c08a/bl24c16a . eight 2k/4k/8k/16k devices may be addressed on a single bus system (device addressing is discussed in detail under the device addressing section). serial data (sda): the sda pin is bi - directional for serial data transfer. this pin is open - drain driven and may be wire - ored with any number of other open - drain or open - collector devices. serial clock (scl): the scl input is used to positive edge clock data into each eepr om device and negative edge clock data out of each device. table 1 figure 1 pin name type functions a0-a2 i address inputs sda i/o serial data scl i serial clock input wp i write protect gnd p ground vcc p power supply s t a r t s t o p l o g i c s e r i a l c o n t r o l l o g i c s c l s d a g n d v c c d e v i c e a d d r e s s c o m p a r a t o r l o a d c c m p d a t a w o r d a d r e s s c o u n t e r l o a d i n c x d e c o d e r y d e c o d e r s e r i a l m u x e e p r o m e n d a t a r e c o v e r y h i g h v o l t a g e p u m p / t i m i n g d o u t / a c k n o w l e d g e d i n d o u t a 0 a 1 a 2 w p
bl24c 02a/04a/08a/16a BL24C02A/04a/08a/16a belling proprietary information. unauthorized photocopy and duplication prohibited ? 2016 belling all rights reserved www.belling.com.cn 3 - 1 6 write protect (wp): the BL24C02A/bl24c04a/bl24c08a/bl24c16a has a write protect pin that provides hardware data protection. the write protect pin allows normal read/write operations when connected to ground (gnd). when the write pro t ection pin is connected to vcc, the write protection feature is enabled and operat es as shown in the following table 2 . functional description 1. memory organization bl24c02 a , 2k serial eeprom: interna lly organized with 16 pages of 16 bytes each, the 2k requires an 8 - bit data word address for random word addressing. bl24c04 a , 4k serial eeprom: internally organized with 32 pages of 16 bytes each, the 4k requires a 9 - bit data word address for random word addressing. bl24c08 a , 8k serial eeprom: internally organized with 64 pages of 16 bytes each, the 8k requires a 10 - bi t data word address for random word addressing. bl24c16 a , 16k serial eeprom: internally organized with 128 pages of 16 bytes each, the 16k requires an 11 - bit data word address for random word addressing. 2. device operation clock and data transitions: the sda pin is normally pulled high with an external device. data on the sda pin may change only during scl low time periods (see figure 2 ). data changes during scl high periods will indicate a start or stop condition as defined below. start condition: a h igh - to - low transition of sda with scl high is a start condition which must precede any other command (see figure 3 ). stop condition: a low - to - high transition of sda with scl high is a stop condition. after a read sequence, the stop command will place the e eprom in a standby power mode (see figure 3 ). acknowledge: all addresses and data words are serially transmitted to and from the eeprom in 8 - bit words. the eeprom sends a "0" to acknowledge that it has received each word. this happens during the ninth cloc k cycle. standby mode: the BL24C02A/bl24c04a/bl24c08a/bl24c16a features a low - power standby mode which is enabled: (a) upon power - up and (b) af t er the receipt of the stop bit and the completion of any internal operations. memory reset: after an interruptio n in protocol, power loss or system reset, any two - wire part can be reset by following these steps: table 2 wp pin status BL24C02A/04a/08a/16a at vcc full array at gnd normal read/write operations
bl24c 02a/04a/08a/16a BL24C02A/04a/08a/16a belling proprietary information. unauthorized photocopy and duplication prohibited ? 2016 belling all rights reserved www.belling.com.cn 4 - 1 6 1. clock up to 9 cycles. 2. look for sda high in each cycle while scl is high. 3. create a start condition. figure 2 . data validity figure 3. start and stop definition figure 4. output acknowledge d a t a s t a b l e d a t a s t a b l e d a t a c h a n g e s d a s c l s d a s c l s t a r t s t o p s c l d a t a i n d a t a o u t s t a r t a c k n o w l e d g e 1 8 9
bl24c 02a/04a/08a/16a BL24C02A/04a/08a/16a belling proprietary information. unauthorized photocopy and duplication prohibited ? 2016 belling all rights reserved www.belling.com.cn 5 - 1 6 3. device addressing the 2k/4k/8k/16k eeprom devices all require an 8 - bit device address word following a start condition to enable the chip for a read or write operation (see figure 5 ) the device address word consists of a mandatory "1", "0" sequence for the first four most significant bits as shown. this is common to all the serial eeprom devices. the next 3 bits are the a2, a1 and a0 device address bits for the 2k eeprom. these 3 bits must compare to their corresponding hardwired input pins. the 4k eeprom only uses the a2 and a1 device add ress bits with the third bit being a memory page address bit. the two device address bits must compare to their corresponding hardwired input pins. the a0 pin is no connect. the 8k eeprom only uses the a2 device address bit with the next 2 bits being for memory page addressing. the a2 bit must compare to its corresponding hard - wired input pin. the a1 and a0 pins are no connect. the 16k does not use any device address bits but instead the 3 bits are used for memory page addressing. these page addressing bi ts on the 4k, 8k and 16k devices should be considered the most significant bits of the data word address which follows. the a0, a1 and a2 pins are no connect the eighth bit of the device address is the read/write operation select bit. a read operation is i nitiated if this bit is high and a write operation is initiated if this bit is low. upon a compare of the device address, the eeprom will output a "0". if a compare is not made, the chip will return to a standby state. 4. write operations byte write: a write operation requires an 8 - bit data word address following the device address word and acknowledgment. upon receipt of this address, the eeprom will again respond with a "0" and then clock in the first 8 - bit data word. following receipt of the 8 - bit data word , the eeprom will output a "0" and the addressing device, such as a microcontroller, must terminate the write sequence with a stop condition. at this time the eeprom enters an internally timed write cycle, twr, to the nonvolatile memory. all inputs are dis abled during this write cycle and the eeprom will not respond until the write is complete (see figure 6 ). page write: the 2k eeprom is capable of an 8 - byte page write, and the 4k, 8k and 16k devices are capable of 16 - byte page writes. a page write is initiated the same as a byte write, but the microcontroller does not send a stop condition after the first data word is clocked in. instead, after the eeprom acknowledges receipt of the first data word, the microcontroller can transmit up t o seven (2k) or fifteen (4k, 8k, 16k) more data
bl24c 02a/04a/08a/16a BL24C02A/04a/08a/16a belling proprietary information. unauthorized photocopy and duplication prohibited ? 2016 belling all rights reserved www.belling.com.cn 6 - 1 6 words. the eeprom will respond with a "0" after each data word received. the microcontroller must terminate the page write sequence with a stop condition (see figure 7 ). the data word address lower three (2 k) or four (4k, 8k, 16k) bits are internally incremented following the receipt of each data word. the higher data word address bits are not incremented, retaining the memory page row location. when the word address, internally generated, reaches the page b oundary, the following byte is placed at the beginning of the same page. if more than eight (2k) or sixteen (4k, 8k, 16k) data words are transmitted to the eeprom, the data word address will "roll over" and previous data will be overwritten. acknowledge p olling: once the internally timed write cycle has started and the eeprom inputs are disabled, acknowledge polling can be initiated. this involves sending a start condition followed by the device address word. the read/write bit is representative of the ope ration desired. only if the internal write cycle has completed will the eeprom respond with a "0", allowing the read or write sequence to continue. 5. read operations read operations are initiated the same way as write operations with the exception that the read/write select bit in the device address word is set to "1". there are three read operations: current address read, random address read and sequential read. current address read: the internal data word address counter maintains the last address accesse d during the last read or write operation, incremented by one. this address stays valid between operations as long as the chip power is maintained. the address "roll over" during read is from the last byte of the last memory page to the first byte of the f irst page. the address "roll over" during write is from the last byte of the current page to the first byte of the same page. once the device address with the read/write select bit set to "1" is clocked in and acknowledged by the eeprom, the current addres s data word is serially clocked out. the microcontroller does not respond with an input "0" but does generate a following stop condition (see figure 8 ). random read: a random read requires a "dummy" byte write sequence to load in the data word address. onc e the device address word and data word address are clocked in and acknowledged by the eeprom, the microcontroller must generate another start condition. the microcontroller now initiates a current address read by sending a device address with the read/wri te select bit high. the eeprom acknowledges the device address and serially clocks out the data word. the microcontroller does not respond with a "0" but does generate a following stop condition (see figure 9 ) sequential read: sequential reads are initiated by either a current address read or a random address read. after the microcontroller receives a data word, it responds with an acknowledge. as long as the eeprom receives an acknowledge, it will continue to increment the data word address and serially clock out sequential data words. when the memory address limit is reached, the data word address will "roll over" and the sequential read will continue. the sequential read operation is terminated when the
bl24c 02a/04a/08a/16a BL24C02A/04a/08a/16a belling proprietary information. unauthorized photocopy and duplication prohibited ? 2016 belling all rights reserved www.belling.com.cn 7 - 1 6 microcontroller does not respond with a "0" but does generate a following stop condition (see figure 10 ). figure 5. device address figure 6 . byte write figure 7 . page write 1 0 1 0 0 0 0 r / w m s b l s b 2 k 1 0 1 0 0 0 p 0 r / w 4 k 1 0 1 0 0 p 1 p 0 r / w 8 k 1 0 1 0 p 2 p 1 p 0 r / w 1 6 k s d a l i n e s t a r t d e v i c e a d d r e s s w r i t e m s b l s b r / w a c k w o r d a d d r e s s a c k l s b a c k l s b s t o p d a t a s t a r t d e v i c e a d d r e s s w r i t e m s b l s b r / w a c k w o r d a d d r e s s a c k l s b a c k s t o p d a t a ( n ) a c k a c k d a t a ( n + 1 ) d a t a ( n + 1 ) s d a l i n e
bl24c 02a/04a/08a/16a BL24C02A/04a/08a/16a belling proprietary information. unauthorized photocopy and duplication prohibited ? 2016 belling all rights reserved www.belling.com.cn 8 - 1 6 figure 8. current address read figure 9 . random read figure 10 . sequential read s t a r t d e v i c e a d d r e s s r e a d m s b l s b r / w a c k s t o p d a t a n o a c k s d a l i n e s t a r t d e v i c e a d d r e s s w r i t e m s b l s b r / w a c k w o r d a d d r e s s a c k l s b s t o p d a t a ( n ) d e v i c e a d d r e s s s t a r t r e a d a c k n o a c k d u m m y w r i t e s d a l i n e d e v i c e a d d r e s s r e a d r / w a c k a c k a c k a c k s t o p d a t a ( n ) d a t a ( n + 1 ) d a t a ( n + 2 ) d a t a ( n + x ) n o a c k s d a l i n e
bl24c 02a/04a/08a/16a BL24C02A/04a/08a/16a belling proprietary information. unauthorized photocopy and duplication prohibited ? 2016 belling all rights reserved www.belling.com.cn 9 - 1 6 electrical characteristics absolute maximum stress ratings ? dc supply voltage . . . . . . . . . . . . . . . . . - 0.3v to +6.5v ? input / output voltage . . . . . . . .gnd - 0.3v to vcc+0.3v ? operating ambient temperature . . . . . - 40 to +85 ? storage temperature . . . . . . . . . . . . - 65 to +150 ? electrostatic pulse (human body model) . . . . . . . 8000v comments stresses above those listed under "absolute maximum ratings" may cause permanent damage to this device. these are stress ratings only. functional operation of this device at these or any other conditions a bove those indicated in the operational sections of this specification is not implied or intended. exposure to the absolute maximum rating conditions for extended periods may affect device reliability. dc electrical characteristics applicable over recommen ded operating range from: ta = - 40 to +85 , vcc = +1.7v to +5.5v (unless otherwise noted) pin capacitance applicable over recommended operating range from ta = 25 , f = 1.0 mhz, vcc = +1.7v table 5 table 6 parameter symbol min typ max unit condition supply voltage v cc1 1.7 - 5.5 v - supply voltage v cc2 2.5 - 5.5 v - supply current vcc=5.0v i cc1 - 0.14 0.3 ma read at 400khz supply current vcc=5.0v i cc2 - 0.28 0.5 ma write at 400khz supply current vcc=5.0v i sb1 - 0.03 0.5 a v in =v cc or v ss input leakage current i l1 - 0.10 1.0 a v in =v cc or v ss output leakage current i lo - 0.05 1.0 a v out =v cc or v ss input low level v il1 -0.3 - v cc 0.3 v v cc =1.7v to 5.5v input high level v ih1 v cc 0.7 - v cc +0.3 v v cc =1.7v to 5.5v output low level vcc=1.7v v ol1 - - 0.2 v i ol =0.15ma output low level vcc=5.0v v ol2 - - 0.4 v i ol =3.0ma parameter symbol min typ max unit condition input/output capacitance(sda) c i/o - - 8 pf v io =0v input capacitance(a0,a1,a2,scl) c in - - 6 pf v in =0v
bl24c 02a/04a/08a/16a BL24C02A/04a/08a/16a belling proprietary information. unauthorized photocopy and duplication prohibited ? 2016 belling all rights reserved www.belling.com.cn 10 - 1 6 ac electrical characteristics applicable over recommended operating range from ta = - 40 to +85 , vcc = +1.7v to +5.5v, cl = 1 ttl gate and 100 pf (unless otherwise noted) notes: 1. this parameter is characterized and is not 100% tested. 2. ac measurement conditions: rl (connects to vcc): 1.3 k input pulse voltages: 0.3 vcc to 0.7 vcc input rise and fall time: 50 ns input and output timing reference voltages: 0.5 vcc the value of rl should be concerned according to the ac tual loading on the user's system. table 7 min typ max min typ max clock frequency,scl f scl - - 400 - - 1000 khz clock pulse width low t low 0.6 - - 0.6 - - s clock pulse width high t high 0.4 - - 0.4 - - s noise suppression time t i - - 50 - - 50 ns clock low to data out valid t aa 0.1 - 0.55 0.1 - 0.55 s time the bus must be free before a new transmission can start t buf 0.5 - - 0.5 - - s start hold time t hd:sta 0.25 - - 0.25 - - s start setup time t su:dat 0.25 - - 0.25 - - s data in hold time t hd:dat 0 - - 0 - - s data in setup time t su:dat 100 - - 100 - - ns input rise time(1) t r - - 0.3 - - 0.3 s input fall time(1) t f - - 0.3 - - 0.3 s stop setup time t su:sto 0.25 - - 0.25 - - s data out hold time t dh 50 - - 50 - - ns write cycle time tw r - 1.9 3 - 1.9 3 ms 5.0v,25,byte mode(1) endurance 1m - - - - - write cycle parameter symbol 1.7vv cc 2.5v 2.5vv cc 5.5v units
bl24c 02a/04a/08a/16a BL24C02A/04a/08a/16a belling proprietary information. unauthorized photocopy and duplication prohibited ? 2016 belling all rights reserved www.belling.com.cn 1 1 - 1 6 bus timing figure 11 . scl: serial clock, sda: serial data i/o write cycle timing figure 12 . scl: serial clock, sda: serial data i/o notes : the write cycle time twr is the time from a valid stop condition of a write sequence to the end of the internal clear/write cycle. s c l s d a _ i n s d a _ o u t t s u . s t a t h d . s t a t l o w t f t h i g h t l o w t h d . d a t t s u . d a t t r t s u . s t o t b u f t d h t a a t w r ( 1 ) a c k s t o p c o n d i t i o n s t a r t c o n d i t i o n s c l s d a w o r d n
bl24c 02a/04a/08a/16a BL24C02A/04a/08a/16a belling proprietary information. unauthorized photocopy and duplication prohibited ? 2016 belling all rights reserved www.belling.com.cn 1 2 - 1 6 package information pdip outline dimensions notes : 1. this drawing is for general information only; refer to jedec drawing ms - 001, variation ba for additional information. 2. dimensions a and l are measured with the package seated in jedec seating plane gauge gs - 3. 3. d, d1 and e1 dimensions do not include mold flash or protrusions. mold flash or protrusions shall not exceed 0.010 inch. 4. e and e a measured with the leads constrained to be perpendicular to datum. 5. pointed or rounded lead tips are preferred to ease insertion. 6. b2 and b3 maximum dimensions do not include dambar protrusions. dambar protrusions shall not exceed 0.010 (0.25 mm). d 1 d e b 3 4 p l c s b 2 b l a a 2 c e a e 1 e t o p v i e w e n d v i e w s i d e v i e w c o m m o n d i m e n s i o n s ( u n i t o f m e a s u r e = i n c h e s ) symbol min nom max note a 0.210 2 a2 0.115 0.130 0.195 b 0.014 0.018 0.022 5 b2 0.045 0.060 0.070 6 b3 0.030 0.039 0.045 6 c 0.008 0.010 0.014 d 0.355 0.365 0.400 3 d1 0.005 3 e 0.300 0.310 0.325 4 e1 0.240 0.250 0.280 3 e ea 4 l 0.115 0.130 0.150 2 0.100bsc 0.300bsc
bl24c 02a/04a/08a/16a BL24C02A/04a/08a/16a belling proprietary information. unauthorized photocopy and duplication prohibited ? 2016 belling all rights reserved www.belling.com.cn 13 - 1 6 sop notes : these drawings are for general information only. refer to jedec drawing ms - 012, variation aa for proper dimensions, tolerances, datum s , etc. 1 n e b e a a 1 d e 1 l c o m m o n d i m e n s i o n s ( u n i t o f m e a s u r e = m m ) symbol min nom max note a 1.35 - 1.75 a1 0.10 - 0.25 b 0.31 - 0.51 c 0.17 - 0.25 d 4.80 - 5.00 e1 3.81 - 3.99 e 5.79 - 6.20 e l 0.40 - 1.27 0" - 8" 1.27bsc
bl24c 02a/04a/08a/16a BL24C02A/04a/08a/16a belling proprietary information. unauthorized photocopy and duplication prohibited ? 2016 belling all rights reserved www.belling.com.cn 14 - 1 6 tssop notes : 1. this drawing is for general information only. refer to jedec drawing mo - 153, variation aa, for proper dimensions, tolerances, datums, etc. 2. dimension d does not include mold flash, protrusions or gate burrs. mold flash, protrusions and gate burrs shall not exceed 0.15 mm (0.006 in) per side. 3. dime nsion e1 does not include inter - lead flash or protrusions. inter - lead flash and protrusions shall not exceed 0.25 mm (0.010 in) per side. 4. dimension b does not include dambar protrusion. allowable dambar protrusion shall be 0.08 mm total in excess of the b dimension at maximummaterial condition. dambar cannot be located on the lower radius of the foot. minimum space between protrusion and adjacent lead is 0.07 mm. 5. dimension d and e1 to be determined at datum plane h. e 1 e 1 2 3 n t o p v i e w d e b a 2 a s i d e v i e w l 1 l e n d v i e w c o m m o n d i m e n s i o n s u n i t o f m e a s u r e = m m symbol min nom max note d 2.90 3.00 3.10 2,5 e e1 4.30 4.40 4.50 3,5 a - - 1.20 a2 0.80 1.00 1.05 b 0.19 - 0.30 4 e l 0.45 0.60 0.75 l1 6.40bsc 0.65bsc 1.00ref
bl24c 02a/04a/08a/16a BL24C02A/04a/08a/16a belling proprietary information. unauthorized photocopy and duplication prohibited ? 2016 belling all rights reserved www.belling.com.cn 15 - 1 6 udfn wlcsp notes: all wafer orientation notch down p i n 1 d o t b y m a r k i n g t o p v i e w b e l d 2 e 2 e d a 3 a a 1 p i n # 1 i d e n t i f i c a t i o n c h a m f e r b o t t o m v i e w s i d e v i e w pkg ref min nom max a >0.50 0.55 0.60 a1 0.00 - 0.05 a3 d 1.95 2.00 2.05 e 2.95 3.00 3.05 b 0.20 0.25 0.30 l 0.20 0.30 0.40 d2 1.25 1.40 1.50 e2 1.15 1.30 1.40 e common dimension(mm) ut:ultra thin 0.15ref 0.50bsc p i n 1 d e t o p v i e w ( m a r k s i d e ) a 1 a a 2 s i d e v i e w x 1 e 1 x 2 d 1 y 1 y 2 b b o t t o m v i e w ( b a l l s i d e ) c o m m o n d i m e n s i o n s ( u n i t s o f m e a s u r e = m i l l i m e t e r ) symbol min nom max a 0.270 0.290 0.310 a1 0.045 0.055 0.065 a2 0.215 0.235 0.255 d 0.738 0.758 0.778 d1 e 0.668 0.688 0.708 e1 b 0.160 0.180 0.200 x1 x2 y1 y2 0.179 ref 0.400bsc 0.400bsc 0.144 ref 0.144 ref 0.179 ref
bl24c 02a/04a/08a/16a BL24C02A/04a/08a/16a belling proprietary information. unauthorized photocopy and duplication prohibited ? 2016 belling all rights reserved www.belling.com.cn 16 - 1 6 ordering information BL24C02A/ bl24c04a/bl24c08a/bl24c16a 1 2 3 code description 1 package type pa: sop - 8l sf: tssop - 8l da: pdip - 8l no: udfn - 8l tc: sot23 - 5l rr: tsot23 - 5l ma: m2.2 mb: m3.2 cs: wlcsp - 4 2 packing type r: tape and reel t: tube 3 feature s: standard (default, pb free rohs std.) c : green ( halogen free)

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